Ref	HW Algorithm	Device	Logic Circuit				Clock (MHz)	Performance			Power (w)
Ref	HW Algorithm		LUTs	FF	B-RAM	DSP	Clock (MHz)	Image Size	fps	Nfps^*	Power (w)
[12]	RTBS Module	Virtex II XC2v6000	No data	No data	No data	No data	25	720 × 576 monochromatic	60	27	No Data
[13]	Morphology Module	XC4010E	No data	No data	No data	No data	25	640 × 480	5	5	No Data
[8]	RAW2RGB Module	XCV800	No data	No data	No data	No data	25	640 × 480	15	15	0.121
[17]	Mirror Module	Virtex 5	1572	No data	No data	No data	47	1920 × 1080	22	79	0.027
[18]	RGB2Y Module	Virtex 2	No data	No data	No data	No data	40	1024 × 1024	38	81	No Data
[19]	SDRAM Controller Module	Virtex 6	788	363	0	3	189	1920 × 1080	91	81	0.0012
Our	I/O and Other Modules	Cyclone II	1618	0	36	5	25	640 × 480	56	56	0.0026
Our^#	Total Used Resource	Cyclone II	1618	0	36	5	113	720 × 576	368	110	0.0026