Signal | Type | Description |
SDRAM_EN | Input | SDRAM Enable signal. |
CLK | Input | Clock signal. |
RST_L | Input | Reset signal. |
SDRAM_CYCLE [3:0] | Input | State machine bits: indicates the type of cycle: 00 = idle, 01 = command, 10 = data, 11 = refresh. |
STATE_CNTR [3:0] | Input | State machine bits—indicates state of cycle. |
SDRAM_MODE_REG [11:0] | Output | Mode Register Value. |
SDRAM_CMND [1:0] | Output | SDRAM command desired: 00 = nop, 01 = precharge, 10 = autorefresh, 11 = load mode register. |
CMND_CYCLE_REQ | Output | Command Cycle Request to state machine. |
SDRAM_SETUP | Output | Indicates SDRAM setup is complete. |