|
| 2-layer MLP | 3-layer MLP |
| w/ sigmoid in software | 90.2% | 95.5% |
| w/ middle D-ReLU in software | 90.0% | 92.9% |
| w/ mean D-ReLU in software | 90.0% | 95.8% |
| w/ sigmoid in hardware (on an FPGA) | 90.3% | 95.6% |
| w/ middle D-ReLU in hardware (on an FPGA) | 89.6% | 92.7% |
| w/ mean D-ReLU in hardware (on an FPGA) | 89.6% | 96.0% |