S. No | Specifications | Simulated |
1 | CMOS Technology | 0.18 μm |
2 | Transconductances (μA/V) | 68.16 μA/V - 789 μA/V at 10 μA - 300 μA |
3 | Bias current (μA) | 10 μA - 300 μA |
4 | % Total Harmonic Distortion | 1.21% - 2.83% |
5 | Power dissipation (mW) | 1.6 mW - 4.76 mW |
6 | Maximum Input noise (nV) | 33 nV- 42 nV |
7 | Maximum output noise (nV) | 24 nV |
8 | Maximum Supply Voltage (V) | ±0.85 V |
9 | Bias Voltage (V) | ±0.50 V |
10 | Phase Margin | 23- 45 |
11 | Input output Voltage Swing (mV) | 0 - 60 mV |
12 | Open loop Gain (dB) | 5.045 - 6.020 dB with typical values 30 dB - 71 dB |
13 | Frequency (KHz) | 1.53 KHz and 10.498 MHz |
14 | Noise Spectral Density | 4.10 at the input and 3.8 |