S. NO

CMOS Circuit

Existing Design

power in µ watts

Proposed Design-1

Power in µ watts

Proposed Design-2 power in µ watts

1

NOT Gate

28.84

15.31

13.46

2

AND Gate

12.44

6.45

6.21

3

OR Gate

17.21

9.310

9.11

4

NAND Gate

10.59

5.630

5.22

5

NOR Gate

10.43

6.151

6.03

6

EX-OR Gate

34.50

18.34

18.40

7

Full Adder

1215

79.81

78.56

8

Carry Look Ahead Adder

915.30

66.79

67.69

9

Ripple Carry Adder

375.00

247.40

176.1

10

Carry Select Adder

19950

13170

10650

11

D Flip Flop

216.06

21.40

38.78

12

SR Latch

10.92

7.917

7.723

13

Shift Register

610.56

410.90

390.5

14

Novel Low Power FA 180 nm

76.73

47.48

44.96

15

Novel Low Power FA 90 nm

3.003

1.731

1.722

16

Novel Low Power FA 45 nm

0.501

0.383

0.375

17

Peres gate

61.48

36.79

36.47

18

Feynman Gate

49.66

34.36

33.51

19

Fredkin Gate

115.50

67.56

66.01

20

C17-ISCAS85

72.68

63.29

58.07

21

S27

3270.00

309.40

515.0