Transistors

Type of Leakage current

Standard 6T SRAM cell

Proposed 10T SRAM Cell

M1

Isub (nA)

3.1

0.39

Igate (nA)

1.1

0.05

M2

Isub (nA)

2

0.06

Igate (nA)

1.86

1.18

M3

Isub (nA)

0

0.46

Igate (nA)

11.13

0.005

M4

Isub (nA)

13.16

1.35

Igate (nA)

6.5

0

M5

Isub (nA)

0.2

0.4

Igate (nA)

0.4

0

M6

Isub (nA)

0.4

0.2

Igate (nA)

0.78

0.6

M7

Isub (nA)

-

0.55

Igate (nA)

-

4.02

M8

Isub (nA)

-

0.89

Igate (nA)

-

0.39

M9

Isub (nA)

-

0.18

Igate (nA)

-

0.58

M10

Isub (nA)

-

1.0

Igate (nA)

-

0

Total Isub (nA)

18.86

5.48

Total Igate (nA)

21.77

6.83

Total Leakage (nA)

40.63

12.31