Device

Output max value

Out min value

Avg. power

Delay

Static power

PDP

VIN = 0 V

VIN = 1.1 V

PMOS

1.2 V

0.233 V

13.26 × 10−9

5 ps

1.3 × 10−15

774 × 10−27

663 × 10−20

DTMOS

0.618 V

0.142 V

10.59 × 10−3

6 ps

275.7 × 10−45

20.28 × 10−3

6.35 × 10−14

NOVEL PMOS

1.2 V

0.158 V

10 nw

3 ns

15.60 × 10−15

3.052 × 10−12

3 × 10−17

NMOS

1.08 V

0 V

8.245 × 10−9

2 ns

1.404 × 10−24

1.306 × 10−15

1.6 × 10−17

DTMOS

1.15 V

0.55 V

17.18 × 10−3

4 ns

37.32 × 10−3

959.1 × 10−30

6.87 × 10−11

PROPOSED NMOS

1.16 V

0 V

5.39 × 10−9

0.0092 ns

45.24 × 10−12

3.12 × 10−15

4.3 × 10−21