Device

Output max value

Out min value

Avg. power

Delay

Static power

PDP

VIN = 0 V

VIN = 1.1 V

PMOS

1.1 V

0.323 V

5.37 × 10−9

16 ps

116 × 19−15

481 × 10−24

8.59 × 10−20

DTMOS

0.805 V

0.217 V

5.85 × 10−3

4 ns

588 × 10−63

11.26 × 10−3

2.34 × 10−14

NOVEL PMOS

1.1 V

0.250 V

1.71 × 10−9 V

4 ps

1.443 × 10−12

822.5 × 10−15

6.84 × 10−21

NMOS

0.79

0

4.412 × 10−9

13 ps

0

101.1 × 10−15

5.73 × 10−20

DTMOS

0.885 V

0.277 V

2.906 × 10−3

4 ns

6.24 × 10−3

48 × 10−27

2.6154 × 10−14

PROPOSED NMOS

0.818 V

0 V

6.29 × 10−9

9 ps

151.8 × 10−15

268.8 × 10−15

5.661 × 10−20