Signal | Type | Description |
SDRAM_CS_L | Input | Chip select signal from processor. |
CMND_CYCL_REQ | Input | Command cycle request from SD_CONFIG module. |
RFRSH_REQ | Input | Refresh request from SD_REFRESH module. |
CLK | Input | Clock signal. |
RST_L | Input | Reset signal. |
SDRAM_CYCLE | Output | State machine bits: indicates the type of cycle: 00 = idle, 01 = command, 10 = data, 11 = refresh. |
STATE_CNTR [3:0] | Output | State machine bits: indicates state of cycle. |